Changes between Version 11 and Version 12 of Hardware/Compute


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Timestamp:
May 11, 2020, 3:18:09 AM (5 years ago)
Author:
msherman
Comment:

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  • Hardware/Compute

    v11 v12  
    1414
    1515=== Block Diagram
     16This block diagram shows the bus connections of the various processing devices hosted by these servers.
     17
     18For best performance, you must take into account the data path, from source to sink, as well as processing and memory locality.
     19
    1620[[Image(block_r740.svg)]]
    1721
    18 
    1922=== GPU
    20 
    21 
     23These servers each have an Nvidia V100 GPU, for CUDA processing.
    2224
    2325=== FPGA
     26These servers each have a Xilinx Alveo U200 FPGA, with two 100g qsfp28 ports. The FPGA can be configured either as an additional NIC, or as a standalone computing device.
    2427
     28In an advanced use case, you could use the FPGA to pre-process radio data, and then send over PCIe or the network to a GPU / CPU for further processing.
    2529
    2630=== Network
     31
     32In addition to the GPU and FPGA, the server has a two (2) port 25g ethernet NIC for data-plane traffic.
     33
     34The 10G NIC is dedicated to control and provisioning traffic, and should not be relied upon for experimental repeatability.