Changes between Version 8 and Version 9 of Hardware/Sub Systems/IDPerformance


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Timestamp:
Mar 2, 2020, 9:34:21 PM (4 years ago)
Author:
seskar
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  • Hardware/Sub Systems/IDPerformance

    v8 v9  
    11= [//https://www.interdigital.com/ InterDigital] 5G NR Platform =
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    3 [[Image(id-nr-bd.png, 200px, align=right)]]
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     3[[Image(id-nr-bd.png, 150px, align=right)]]
    54[//https://www.interdigital.com/ InterDigital] has developed for research and development purposes their FPGA based, NR Rel-15 mmWave prototype platform.  Each Mast Head unit (MHU) contains a 64-element antenna with +40dBm RMS, Anokiwave quad analog phased array chips, 28GHz up/down conversion from/to 5-6GHz IF that is housed in an IP67 weather proof enclosure.
    65The baseband unit, Modem Processor Unit (MPU) is designed according to 3GPP Rel-15 PHY specifications and is implemented in a Xilinx MPSOC FPGA.  The MPU contains two Xilinx Zu15EG SOM modules (2nd for future use), IF frontend, USB 2.0/3.0, SFP ports, Gigabit Ethernet interfaces and a SMA connection to the MHU.     
     
    87The current implementation supports a single UE and gNB, however the system was designed to support 2 UEs using different gNB beams and appropriate changes to the UE scheduler.
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    119The NR platform is a TDD system with a baseband that supports FR2, 120KHz sub-carrier spacing, fixed frame format (modified format 32), 200MHz bandwidth, SISO, NR LDPC coding for data channels, convolutional coder* for PUCCH and PDCCH and 8 SSB beams with CSI reporting for link adaptation. The MHU/MPU system supports horizontal beam angles of: ± 45deg, ± 30deg, ± 15 deg, 0deg and a single fixed vertical beam.
    1210The Rel-15 PHY supports DL and UL channels: PDSCH, PDCCH, PUSCH, PUCCCH, PBCH, PRACH, PSS. The PHY supports QPSK, 16QAM and 64QAM, DL MCS up to 18 and UL MCS up to 27 using the full 132 PRBs.  The system is designed to support peak UL speeds up to 100Mbps and peak DL speeds up to 238Mbps.
     11[[Image(MPUh5.jpg, 150px, align=right)]]
     12
    1313The UE and gNB each have a NR FAPI-like interface between the PHY and MAC that facilitates the option to integrate the PHY with a 3rd party L23 protocol stacks.
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    1515The slot format used on the platform is slot format 32, modified by using 2 symbols for DTx purposes to allow for Tx/RX radio switching delays.
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    17  [[Image(slotformat32.png, 800px)]]
     17[[Image(slotformat32.png, 800px)]]
    1818
    1919 ||  Symbols used for DL and UL shared and control channels  ||  Symbols  used for PSS and PBCH during slots carrying  SSB information.  ||  Symbols used for PRACH  during PRACH slots  ||