Changes between Version 10 and Version 11 of Tutorials/Wireless/mmwaveRFSoC

Timestamp:

Sep 24, 2020, 2:56:08 AM (4 years ago)

Author:

skrimpon

Comment:

—

Tutorials/Wireless/mmwaveRFSoC

@@ -8 +8 @@
 Current mmWave setup in COSMOS SB1 looks as shown in the figure below.
 
-|| [[Image(MISO_tutorial.jpg, 900px)]] ||
+|| [[Image(MISO_tutorial.jpg, 800px)]] ||
 
 In the benchtop 60GHz setup of SandBox1, either USRP X310 or RFSoC ZCU111 can be used for baseband processing. RF Switch boxes as shown in the figure are used to select between X310 and RFSoC. RF switch commands are explained at wiki:/Resources/Services/RFSwitch. To select ZCU111 as baseband processing units, all the switches in the RF switch boxes are configured to port 2.
@@ -29 +29 @@
 omf tell -a offh -t system:topo:allres
 }}}
- 1. The image rfsoc_sivers_sb1_cosmos.ndz is [baseline_uhd.ndz] with Sivers control software and the Xilinx XSCT software installed
-  Load sivers_sb1_cosmos.ndz on srv3,srv4.  
+ 1. The image rfsoc_sivers_sb1.ndz is [baseline_uhd.ndz] with Sivers control software and the Xilinx XSCT software installed
+  Load rfsoc_sivers_sb1.ndz on srv3,srv4.  
 {{{#!shell
-omf load -i rfsoc_sivers_sb1_cosmos.ndz -t srv3-lg1,srv4-lg1
+omf load -i rfsoc_sivers_sb1.ndz -t srv3-lg1,srv4-lg1
 }}}
  1. Turn all the required resources on and check the status
@@ -69 +69 @@
 === Experiment Execution ===
 
+==== Configure the 10G interface ====
+The IP addresses for Ethernet Port 1(10G) on the RFSoCs rfdev3-3 and rfdev3-4 are hard-coded to `10.115.6.3` and `10.115.6.4` respectively. To access them from `srv3-lg1` or `srv4-lg1`, configure the network interface `enp1s0` of `srv3-lg1` to `10.115.1.3` and `srv4-lg1` to `10.115.1.4`, as follows
+{{{#!shell-session
+root@srv3-lg1:~# ip link set enp1s0 mtu 9000 up
+root@srv3-lg1:~# ip addr add 10.115.1.3/16 dev enp1s0
+root@srv3-lg1:~# ip addr show dev enp1s0
+4: enp1s0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 9000 qdisc mq state UP group default qlen 1000
+    link/ether f4:52:14:83:b9:30 brd ff:ff:ff:ff:ff:ff
+    inet 10.115.1.3/16 brd 10.115.255.255 scope global enp1s0
+       valid_lft forever preferred_lft forever
+    inet6 fe80::f652:14ff:fe83:b930/64 scope link
+       valid_lft forever preferred_lft forever
+}}}
+
+
 ==== Prepare RFSoC boards ====
 We need to download the FPGA firmware, the linux image and the rootfs over the JTAG. We use the Xilinx XSCT tool to do that. Note that this process will take around 5-10'.
 
-* Configure the FPGA firmware of the rfdev3-3 from the srv3-lg1 as follows:
+* Configure the FPGA firmware of the `rfdev3-3` from the `srv3-lg1` as follows:
 {{{#!shell-session
 root@srv3-lg1:~# cd rfsoc/firmware/sb1_rfdev3_3/
@@ -78 +93 @@
 }}}
 
-* Configure the FPGA firmware of the rfdev3-4 from the srv4-lg1 as follows:
+* Configure the FPGA firmware of the `rfdev3-4` from the `srv4-lg1` as follows:
 {{{#!shell-session
 root@srv4-lg1:~# cd rfsoc/firmware/sb1_rfdev3_4/