wiki:Resources/Notes/KryptonUsage

USRP-2974 (Krypton) driver install and usage

Description

A quick walk thru on how to install the PCIe driver for Krypton and start using the device. The Krypton is a stand-alone SDR with a host controller with radio portion connected to the host via PCIe bus. The specifications for Krypton is here.

Installation / Starting of PCIe driver

From the COSMOS console, load an image that has a compatible UHD & kernel driver already installed. The image baseline-uhd.ndz or similar can be used.

console:~# omf load -i baseline-uhd.ndz  -t sdr2-s1-lg1.sb1.cosmos-lab.org
console:~# omf tell -a on -t sdr2-s1-lg1.sb1.cosmos-lab.org

Now ssh into the Krypton host and verify it is able to detect the radio on the PCIe bus. Use lspci to list all the devices that are detected.

root@sdr2-s1-lg1:~# lspci 

In the output of lspci, search for Signal processing controller: National Instruments PXIe/PCIe Device. This means the host computer's PCIe controller sees the Krypton radio. Now download and install the PCIe driver so the UHD applications access the radio. Complete details on this driver is here.

root@sdr2-s1-lg1:~# wget http://files.ettus.com/binaries/niusrprio/niusrprio-installer-18.0.0.tar.gz
root@sdr2-s1-lg1:~# tar -zxf niusrprio-installer-18.0.0.tar.gz
root@sdr2-s1-lg1:~# sudo niusrprio_installer/INSTALL

After the installation is complete start the driver by loading it into the kernel modules.

root@sdr2-s1-lg1:~# /usr/local/bin/niusrprio_pcie start
Making sure drivers are up to date...
Module nikal is up-to-date
Module nistreamk is up-to-date
Module nibds is up-to-date
Module niusrpriok is up-to-date
Module NiRioSrv is up-to-date
Loading: NiRioSrv niusrpriok
Starting: niusrpriorpc

At this point use uhd_find_devices and uhd_usrp_probe query the radio.

root@sdr2-s1-lg1:~# uhd_find_devices --args="type=x300"
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_106501; UHD_3.15.0.HEAD-0-gaea0e2de
--------------------------------------------------
-- UHD Device 0
--------------------------------------------------
Device Address:
    serial: 31557B9
    fpga: HG
    name:
    product: X310
    resource: RIO0
    type: x300

root@sdr2-s1-lg1:~# uhd_usrp_probe --args="resource=rio0,type=x300"
[INFO] [UHD] linux; GNU C++ version 7.5.0; Boost_106501; UHD_3.15.0.HEAD-0-gaea0e2de
[INFO] [X300] X300 initialization sequence...
[INFO] [X300] Connecting to niusrpriorpc at localhost:5444...
[INFO] [X300] Using LVBITX bitfile /usr/local/share/uhd/images/usrp_x310_fpga_HG.lvbitx
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [GPS] Found an internal GPSDO: LC_XO, Firmware Rev 0.929b
[INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D00000000000)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1311 MB/s)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1303 MB/s)
[INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD100000000001)
[INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DDC_1] Initializing block control (NOC ID: 0xDDC0000000000000)
[INFO] [0/DUC_0] Initializing block control (NOC ID: 0xD0C0000000000000)
[INFO] [0/DUC_1] Initializing block control (NOC ID: 0xD0C0000000000000)
  _____________________________________________________
 /
|       Device: X-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: NI-2974
|   |   revision: 12
|   |   revision_compat: 7
|   |   product: 31131
|   |   mac-addr0: 00:80:2f:26:08:92
|   |   mac-addr1: 00:80:2f:26:08:93
|   |   gateway: 192.168.10.1
|   |   ip-addr0: 192.168.10.2
|   |   subnet0: 255.255.255.0
|   |   ip-addr1: 192.168.20.2
|   |   subnet1: 255.255.255.0
|   |   ip-addr2: 192.168.30.2
|   |   subnet2: 255.255.255.0
|   |   ip-addr3: 192.168.40.2
|   |   subnet3: 255.255.255.0
|   |   serial: 3171336
|   |   FW Version: 6.0
|   |   FPGA Version: 36.0
|   |   FPGA git hash: fde2a94
|   |   RFNoC capable: Yes
|   |
|   |   Time sources:  internal, external, gpsdo
|   |   Clock sources: internal, external, gpsdo
|   |   Sensors: gps_gpgga, gps_gprmc, gps_time, gps_locked, gps_servo, ref_locked
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |   ID: UBX-TDD (0x0203)
|   |   |   Serial: 318D9DE
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: UBX RX
|   |   |   |   Antennas: TX/RX, RX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: ads62p48
|   |   |   |   Gain range digital: 0.0 to 6.0 step 0.5 dB
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: B
|   |   |   ID: UBX-TDD (0x0203)
|   |   |   Serial: 318D9EF
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: UBX RX
|   |   |   |   Antennas: TX/RX, RX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: B
|   |   |   |   Name: ads62p48
|   |   |   |   Gain range digital: 0.0 to 6.0 step 0.5 dB
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: A
|   |   |   ID: UBX-TDD (0x0202)
|   |   |   Serial: 318D9DE
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: UBX TX
|   |   |   |   Antennas: TX/RX, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: QI
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: A
|   |   |   |   Name: ad9146
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: B
|   |   |   ID: UBX-TDD (0x0202)
|   |   |   Serial: 318D9EF
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: UBX TX
|   |   |   |   Antennas: TX/RX, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 10.000 to 6000.000 MHz
|   |   |   |   Gain range PGA0: 0.0 to 31.5 step 0.5 dB
|   |   |   |   Bandwidth range: 160000000.0 to 160000000.0 step 0.0 Hz
|   |   |   |   Connection Type: QI
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: B
|   |   |   |   Name: ad9146
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       RFNoC blocks on this device:
|   |   |
|   |   |   * DmaFIFO_0
|   |   |   * Radio_0
|   |   |   * Radio_1
|   |   |   * DDC_0
|   |   |   * DDC_1
|   |   |   * DUC_0
|   |   |   * DUC_1

Trouble shooting

FPGA version mismatch

If the above commands return with an error message stating an FPGA version mismatch, then we'll need to update the FPGA that is compatible with the current UHD version. The typical error message would be similar to the following:

[ERROR] [0/DmaFIFO_0] Major compat number mismatch for noc_shell: Expecting 5, got 2.
[INFO] [MPM.PeriphManager] init() called with device args `clock_source=internal,time_source=internal,mgmt_addr=10.115.2.1,product=n310'.
[ERROR] [MPMD] Failure during block enumeration: RuntimeError: FPGA component `noc_shell' is revision 2 and UHD supports revision 5. Please either up.
Error: RuntimeError: Failed to run enumerate_rfnoc_blocks()

To update the FPGA following these steps.

root@sdr2-s1-lg1:~#  /usr/local/lib/uhd/utils/uhd_images_downloader.py
root@sdr2-s1-lg1:~# uhd_image_loader --args "type=x300"
root@sdr2-s1-lg1:~# restart 

Note: If the Krypton host is rebooted, the driver modules are NOT automatically reloaded into the kernel. So the command /usr/local/bin/niusrprio_pcie start has to be run on the Krypton host everytime it is power-cycled or rebooted.

root@sdr2-lg1:~# /usr/local/bin/niusrprio_pcie start

NI Driver does not build

While trying to build the NI driver following the instructions above, you may encounter an error regarding the do_munmap function not having enough input arguments. To fix, issue the following command to open the problematic C code file in nano:

nano /var/lib/nikal/5.0.0-29-generic/nikal/nikal.c

In nano, use CTRL-W to search for "do_munmap" and locate the following function:

static inline int nNIKAL240_do_munmap(struct mm_struct *mm, unsigned long addr, size_t len)
{
#if defined(nNIKAL1_kDoMunmapHasUf)
   return do_munmap(mm, addr, len, NULL);
#elif defined(nNIKAL100_kDoMunmapHasAcct)
   return do_munmap(mm, addr, len, 1);
#else
   return do_munmap(mm, addr, len);
#endif
}

Note that the third and final call to do_munmap is missing the fourth parameter. Add NULL as the fourth parameter so that the line reads as the following:

   return do_munmap(mm, addr, len, NULL);

Save the file by typing CTRL-O, Enter and close by typing CTRL-X. Try building the driver again - it should proceed without issue.

Last modified 11 days ago Last modified on Jul 31, 2020, 2:08:13 PM
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